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fsl_common_arm.h
1/*
2 * Copyright (c) 2015-2016, Freescale Semiconductor, Inc.
3 * Copyright 2016-2022 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9#ifndef _FSL_COMMON_ARM_H_
10#define _FSL_COMMON_ARM_H_
11
14/*
15 * For CMSIS pack RTE.
16 * CMSIS pack RTE generates "RTC_Components.h" which contains the statements
17 * of the related <RTE_Components_h> element for all selected software components.
18 */
19#ifdef _RTE_
20#include "RTE_Components.h"
21#endif
22
23/*
24 * @addtogroup ksdk_common
25 * @{
26 */
27
64/* clang-format off */
65#if ((defined(__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
66 (defined(__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
67 (defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
68 (defined(__ARM_ARCH_8M_BASE__) && (__ARM_ARCH_8M_BASE__ == 1)))
69/* clang-format on */
70
71/* If the LDREX and STREX are supported, use them. */
72#define _SDK_ATOMIC_LOCAL_OPS_1BYTE(addr, val, ops) \
73 do \
74 { \
75 (val) = __LDREXB(addr); \
76 (ops); \
77 } while (0UL != __STREXB((val), (addr)))
78
79#define _SDK_ATOMIC_LOCAL_OPS_2BYTE(addr, val, ops) \
80 do \
81 { \
82 (val) = __LDREXH(addr); \
83 (ops); \
84 } while (0UL != __STREXH((val), (addr)))
85
86#define _SDK_ATOMIC_LOCAL_OPS_4BYTE(addr, val, ops) \
87 do \
88 { \
89 (val) = __LDREXW(addr); \
90 (ops); \
91 } while (0UL != __STREXW((val), (addr)))
92
93static inline void _SDK_AtomicLocalAdd1Byte(volatile uint8_t *addr, uint8_t val)
94{
95 uint8_t s_val;
96
97 _SDK_ATOMIC_LOCAL_OPS_1BYTE(addr, s_val, s_val += val);
98}
99
100static inline void _SDK_AtomicLocalAdd2Byte(volatile uint16_t *addr, uint16_t val)
101{
102 uint16_t s_val;
103
104 _SDK_ATOMIC_LOCAL_OPS_2BYTE(addr, s_val, s_val += val);
105}
106
107static inline void _SDK_AtomicLocalAdd4Byte(volatile uint32_t *addr, uint32_t val)
108{
109 uint32_t s_val;
110
111 _SDK_ATOMIC_LOCAL_OPS_4BYTE(addr, s_val, s_val += val);
112}
113
114static inline void _SDK_AtomicLocalSub1Byte(volatile uint8_t *addr, uint8_t val)
115{
116 uint8_t s_val;
117
118 _SDK_ATOMIC_LOCAL_OPS_1BYTE(addr, s_val, s_val -= val);
119}
120
121static inline void _SDK_AtomicLocalSub2Byte(volatile uint16_t *addr, uint16_t val)
122{
123 uint16_t s_val;
124
125 _SDK_ATOMIC_LOCAL_OPS_2BYTE(addr, s_val, s_val -= val);
126}
127
128static inline void _SDK_AtomicLocalSub4Byte(volatile uint32_t *addr, uint32_t val)
129{
130 uint32_t s_val;
131
132 _SDK_ATOMIC_LOCAL_OPS_4BYTE(addr, s_val, s_val -= val);
133}
134
135static inline void _SDK_AtomicLocalSet1Byte(volatile uint8_t *addr, uint8_t bits)
136{
137 uint8_t s_val;
138
139 _SDK_ATOMIC_LOCAL_OPS_1BYTE(addr, s_val, s_val |= bits);
140}
141
142static inline void _SDK_AtomicLocalSet2Byte(volatile uint16_t *addr, uint16_t bits)
143{
144 uint16_t s_val;
145
146 _SDK_ATOMIC_LOCAL_OPS_2BYTE(addr, s_val, s_val |= bits);
147}
148
149static inline void _SDK_AtomicLocalSet4Byte(volatile uint32_t *addr, uint32_t bits)
150{
151 uint32_t s_val;
152
153 _SDK_ATOMIC_LOCAL_OPS_4BYTE(addr, s_val, s_val |= bits);
154}
155
156static inline void _SDK_AtomicLocalClear1Byte(volatile uint8_t *addr, uint8_t bits)
157{
158 uint8_t s_val;
159
160 _SDK_ATOMIC_LOCAL_OPS_1BYTE(addr, s_val, s_val &= ~bits);
161}
162
163static inline void _SDK_AtomicLocalClear2Byte(volatile uint16_t *addr, uint16_t bits)
164{
165 uint16_t s_val;
166
167 _SDK_ATOMIC_LOCAL_OPS_2BYTE(addr, s_val, s_val &= ~bits);
168}
169
170static inline void _SDK_AtomicLocalClear4Byte(volatile uint32_t *addr, uint32_t bits)
171{
172 uint32_t s_val;
173
174 _SDK_ATOMIC_LOCAL_OPS_4BYTE(addr, s_val, s_val &= ~bits);
175}
176
177static inline void _SDK_AtomicLocalToggle1Byte(volatile uint8_t *addr, uint8_t bits)
178{
179 uint8_t s_val;
180
181 _SDK_ATOMIC_LOCAL_OPS_1BYTE(addr, s_val, s_val ^= bits);
182}
183
184static inline void _SDK_AtomicLocalToggle2Byte(volatile uint16_t *addr, uint16_t bits)
185{
186 uint16_t s_val;
187
188 _SDK_ATOMIC_LOCAL_OPS_2BYTE(addr, s_val, s_val ^= bits);
189}
190
191static inline void _SDK_AtomicLocalToggle4Byte(volatile uint32_t *addr, uint32_t bits)
192{
193 uint32_t s_val;
194
195 _SDK_ATOMIC_LOCAL_OPS_4BYTE(addr, s_val, s_val ^= bits);
196}
197
198static inline void _SDK_AtomicLocalClearAndSet1Byte(volatile uint8_t *addr, uint8_t clearBits, uint8_t setBits)
199{
200 uint8_t s_val;
201
202 _SDK_ATOMIC_LOCAL_OPS_1BYTE(addr, s_val, s_val = (s_val & ~clearBits) | setBits);
203}
204
205static inline void _SDK_AtomicLocalClearAndSet2Byte(volatile uint16_t *addr, uint16_t clearBits, uint16_t setBits)
206{
207 uint16_t s_val;
208
209 _SDK_ATOMIC_LOCAL_OPS_2BYTE(addr, s_val, s_val = (s_val & ~clearBits) | setBits);
210}
211
212static inline void _SDK_AtomicLocalClearAndSet4Byte(volatile uint32_t *addr, uint32_t clearBits, uint32_t setBits)
213{
214 uint32_t s_val;
215
216 _SDK_ATOMIC_LOCAL_OPS_4BYTE(addr, s_val, s_val = (s_val & ~clearBits) | setBits);
217}
218
219#define SDK_ATOMIC_LOCAL_ADD(addr, val) \
220 ((1UL == sizeof(*(addr))) ? \
221 _SDK_AtomicLocalAdd1Byte((volatile uint8_t *)(volatile void *)(addr), (uint8_t)(val)) : \
222 ((2UL == sizeof(*(addr))) ? _SDK_AtomicLocalAdd2Byte((volatile uint16_t *)(volatile void *)(addr), (uint16_t)(val)) : \
223 _SDK_AtomicLocalAdd4Byte((volatile uint32_t *)(volatile void *)(addr), (uint32_t)(val))))
224
225#define SDK_ATOMIC_LOCAL_SUB(addr, val) \
226 ((1UL == sizeof(*(addr))) ? \
227 _SDK_AtomicLocalSub1Byte((volatile uint8_t *)(volatile void *)(addr), (uint8_t)(val)) : \
228 ((2UL == sizeof(*(addr))) ? _SDK_AtomicLocalSub2Byte((volatile uint16_t *)(volatile void *)(addr), (uint16_t)(val)) : \
229 _SDK_AtomicLocalSub4Byte((volatile uint32_t *)(volatile void *)(addr), (uint32_t)(val))))
230
231#define SDK_ATOMIC_LOCAL_SET(addr, bits) \
232 ((1UL == sizeof(*(addr))) ? \
233 _SDK_AtomicLocalSet1Byte((volatile uint8_t *)(volatile void *)(addr), (uint8_t)(bits)) : \
234 ((2UL == sizeof(*(addr))) ? _SDK_AtomicLocalSet2Byte((volatile uint16_t *)(volatile void *)(addr), (uint16_t)(bits)) : \
235 _SDK_AtomicLocalSet4Byte((volatile uint32_t *)(volatile void *)(addr), (uint32_t)(bits))))
236
237#define SDK_ATOMIC_LOCAL_CLEAR(addr, bits) \
238 ((1UL == sizeof(*(addr))) ? \
239 _SDK_AtomicLocalClear1Byte((volatile uint8_t *)(volatile void *)(addr), (uint8_t)(bits)) : \
240 ((2UL == sizeof(*(addr))) ? \
241 _SDK_AtomicLocalClear2Byte((volatile uint16_t *)(volatile void *)(addr), (uint16_t)(bits)) : \
242 _SDK_AtomicLocalClear4Byte((volatile uint32_t *)(volatile void *)(addr), (uint32_t)(bits))))
243
244#define SDK_ATOMIC_LOCAL_TOGGLE(addr, bits) \
245 ((1UL == sizeof(*(addr))) ? \
246 _SDK_AtomicLocalToggle1Byte((volatile uint8_t *)(volatile void *)(addr), (uint8_t)(bits)) : \
247 ((2UL == sizeof(*(addr))) ? \
248 _SDK_AtomicLocalToggle2Byte((volatile uint16_t *)(volatile void *)(addr), (uint16_t)(bits)) : \
249 _SDK_AtomicLocalToggle4Byte((volatile uint32_t *)(volatile void *)(addr), (uint32_t)(bits))))
250
251#define SDK_ATOMIC_LOCAL_CLEAR_AND_SET(addr, clearBits, setBits) \
252 ((1UL == sizeof(*(addr))) ? \
253 _SDK_AtomicLocalClearAndSet1Byte((volatile uint8_t *)(volatile void *)(addr), (uint8_t)(clearBits), (uint8_t)(setBits)) : \
254 ((2UL == sizeof(*(addr))) ? \
255 _SDK_AtomicLocalClearAndSet2Byte((volatile uint16_t *)(volatile void *)(addr), (uint16_t)(clearBits), (uint16_t)(setBits)) : \
256 _SDK_AtomicLocalClearAndSet4Byte((volatile uint32_t *)(volatile void *)(addr), (uint32_t)(clearBits), (uint32_t)(setBits))))
257#else
258
259#define SDK_ATOMIC_LOCAL_ADD(addr, val) \
260 do \
261 { \
262 uint32_t s_atomicOldInt; \
263 s_atomicOldInt = DisableGlobalIRQ(); \
264 *(addr) += (val); \
265 EnableGlobalIRQ(s_atomicOldInt); \
266 } while (0)
267
268#define SDK_ATOMIC_LOCAL_SUB(addr, val) \
269 do \
270 { \
271 uint32_t s_atomicOldInt; \
272 s_atomicOldInt = DisableGlobalIRQ(); \
273 *(addr) -= (val); \
274 EnableGlobalIRQ(s_atomicOldInt); \
275 } while (0)
276
277#define SDK_ATOMIC_LOCAL_SET(addr, bits) \
278 do \
279 { \
280 uint32_t s_atomicOldInt; \
281 s_atomicOldInt = DisableGlobalIRQ(); \
282 *(addr) |= (bits); \
283 EnableGlobalIRQ(s_atomicOldInt); \
284 } while (0)
285
286#define SDK_ATOMIC_LOCAL_CLEAR(addr, bits) \
287 do \
288 { \
289 uint32_t s_atomicOldInt; \
290 s_atomicOldInt = DisableGlobalIRQ(); \
291 *(addr) &= ~(bits); \
292 EnableGlobalIRQ(s_atomicOldInt); \
293 } while (0)
294
295#define SDK_ATOMIC_LOCAL_TOGGLE(addr, bits) \
296 do \
297 { \
298 uint32_t s_atomicOldInt; \
299 s_atomicOldInt = DisableGlobalIRQ(); \
300 *(addr) ^= (bits); \
301 EnableGlobalIRQ(s_atomicOldInt); \
302 } while (0)
303
304#define SDK_ATOMIC_LOCAL_CLEAR_AND_SET(addr, clearBits, setBits) \
305 do \
306 { \
307 uint32_t s_atomicOldInt; \
308 s_atomicOldInt = DisableGlobalIRQ(); \
309 *(addr) = (*(addr) & ~(clearBits)) | (setBits); \
310 EnableGlobalIRQ(s_atomicOldInt); \
311 } while (0)
312
313#endif
317/* @{ */
319#define USEC_TO_COUNT(us, clockFreqInHz) (uint64_t)(((uint64_t)(us) * (clockFreqInHz)) / 1000000U)
321#define COUNT_TO_USEC(count, clockFreqInHz) (uint64_t)((uint64_t)(count)*1000000U / (clockFreqInHz))
322
324#define MSEC_TO_COUNT(ms, clockFreqInHz) (uint64_t)((uint64_t)(ms) * (clockFreqInHz) / 1000U)
326#define COUNT_TO_MSEC(count, clockFreqInHz) (uint64_t)((uint64_t)(count)*1000U / (clockFreqInHz))
327/* @} */
328
338#if (defined __CORTEX_M) && ((__CORTEX_M == 4U) || (__CORTEX_M == 7U))
339#define SDK_ISR_EXIT_BARRIER __DSB()
340#else
341#define SDK_ISR_EXIT_BARRIER
342#endif
343
347/* @{ */
348#if (defined(__ICCARM__))
349/*
350 * Workaround to disable MISRA C message suppress warnings for IAR compiler.
351 * http:/ /supp.iar.com/Support/?note=24725
352 */
353_Pragma("diag_suppress=Pm120")
354#define SDK_PRAGMA(x) _Pragma(#x)
355 _Pragma("diag_error=Pm120")
357#define SDK_ALIGN(var, alignbytes) SDK_PRAGMA(data_alignment = alignbytes) var
358#elif defined(__CC_ARM) || defined(__ARMCC_VERSION)
360#define SDK_ALIGN(var, alignbytes) __attribute__((aligned(alignbytes))) var
361#elif defined(__GNUC__)
363#define SDK_ALIGN(var, alignbytes) var __attribute__((aligned(alignbytes)))
364#else
365#error Toolchain not supported
366#endif
367
369#if defined(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)
370#define SDK_L1DCACHE_ALIGN(var) SDK_ALIGN(var, FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)
371#endif
373#if defined(FSL_FEATURE_L2CACHE_LINESIZE_BYTE)
374#define SDK_L2CACHE_ALIGN(var) SDK_ALIGN(var, FSL_FEATURE_L2CACHE_LINESIZE_BYTE)
375#endif
376
378#define SDK_SIZEALIGN(var, alignbytes) \
379 ((unsigned int)((var) + ((alignbytes)-1U)) & (unsigned int)(~(unsigned int)((alignbytes)-1U)))
380/* @} */
381
383/* For initialized non-zero non-cacheable variables, please using "AT_NONCACHEABLE_SECTION_INIT(var) ={xx};" or
384 * "AT_NONCACHEABLE_SECTION_ALIGN_INIT(var) ={xx};" in your projects to define them, for zero-inited non-cacheable
385 * variables, please using "AT_NONCACHEABLE_SECTION(var);" or "AT_NONCACHEABLE_SECTION_ALIGN(var);" to define them,
386 * these zero-inited variables will be initialized to zero in system startup.
387 */
388/* @{ */
389
390#if ((!(defined(FSL_FEATURE_HAS_NO_NONCACHEABLE_SECTION) && FSL_FEATURE_HAS_NO_NONCACHEABLE_SECTION)) && \
391 defined(FSL_FEATURE_L1ICACHE_LINESIZE_BYTE))
392
393#if (defined(__ICCARM__))
394#define AT_NONCACHEABLE_SECTION(var) var @"NonCacheable"
395#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) SDK_PRAGMA(data_alignment = alignbytes) var @"NonCacheable"
396#define AT_NONCACHEABLE_SECTION_INIT(var) var @"NonCacheable.init"
397#define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) \
398 SDK_PRAGMA(data_alignment = alignbytes) var @"NonCacheable.init"
399
400#elif (defined(__CC_ARM) || defined(__ARMCC_VERSION))
401#define AT_NONCACHEABLE_SECTION_INIT(var) __attribute__((section("NonCacheable.init"))) var
402#define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) \
403 __attribute__((section("NonCacheable.init"))) __attribute__((aligned(alignbytes))) var
404#if (defined(__CC_ARM))
405#define AT_NONCACHEABLE_SECTION(var) __attribute__((section("NonCacheable"), zero_init)) var
406#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) \
407 __attribute__((section("NonCacheable"), zero_init)) __attribute__((aligned(alignbytes))) var
408#else
409#define AT_NONCACHEABLE_SECTION(var) __attribute__((section(".bss.NonCacheable"))) var
410#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) \
411 __attribute__((section(".bss.NonCacheable"))) __attribute__((aligned(alignbytes))) var
412#endif
413
414#elif (defined(__GNUC__))
415/* For GCC, when the non-cacheable section is required, please define "__STARTUP_INITIALIZE_NONCACHEDATA"
416 * in your projects to make sure the non-cacheable section variables will be initialized in system startup.
417 */
418#define AT_NONCACHEABLE_SECTION_INIT(var) __attribute__((section("NonCacheable.init"))) var
419#define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) \
420 __attribute__((section("NonCacheable.init"))) var __attribute__((aligned(alignbytes)))
421#define AT_NONCACHEABLE_SECTION(var) __attribute__((section("NonCacheable,\"aw\",%nobits @"))) var
422#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) \
423 __attribute__((section("NonCacheable,\"aw\",%nobits @"))) var __attribute__((aligned(alignbytes)))
424#else
425#error Toolchain not supported.
426#endif
427
428#else
429
430#define AT_NONCACHEABLE_SECTION(var) var
431#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) SDK_ALIGN(var, alignbytes)
432#define AT_NONCACHEABLE_SECTION_INIT(var) var
433#define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) SDK_ALIGN(var, alignbytes)
434
435#endif
436
437/* @} */
438
443#if (defined(__ICCARM__))
444#define AT_QUICKACCESS_SECTION_CODE(func) func @"CodeQuickAccess"
445#define AT_QUICKACCESS_SECTION_DATA(var) var @"DataQuickAccess"
446#define AT_QUICKACCESS_SECTION_DATA_ALIGN(var, alignbytes) \
447 SDK_PRAGMA(data_alignment = alignbytes) var @"DataQuickAccess"
448#elif (defined(__CC_ARM) || defined(__ARMCC_VERSION))
449#define AT_QUICKACCESS_SECTION_CODE(func) __attribute__((section("CodeQuickAccess"), __noinline__)) func
450#define AT_QUICKACCESS_SECTION_DATA(var) __attribute__((section("DataQuickAccess"))) var
451#define AT_QUICKACCESS_SECTION_DATA_ALIGN(var, alignbytes) \
452 __attribute__((section("DataQuickAccess"))) __attribute__((aligned(alignbytes))) var
453#elif (defined(__GNUC__))
454#define AT_QUICKACCESS_SECTION_CODE(func) __attribute__((section("CodeQuickAccess"), __noinline__)) func
455#define AT_QUICKACCESS_SECTION_DATA(var) __attribute__((section("DataQuickAccess"))) var
456#define AT_QUICKACCESS_SECTION_DATA_ALIGN(var, alignbytes) \
457 __attribute__((section("DataQuickAccess"))) var __attribute__((aligned(alignbytes)))
458#else
459#error Toolchain not supported.
460#endif /* defined(__ICCARM__) */
461
463#if (defined(__ICCARM__))
464#define RAMFUNCTION_SECTION_CODE(func) func @"RamFunction"
465#elif (defined(__CC_ARM) || defined(__ARMCC_VERSION))
466#define RAMFUNCTION_SECTION_CODE(func) __attribute__((section("RamFunction"))) func
467#elif (defined(__GNUC__))
468#define RAMFUNCTION_SECTION_CODE(func) __attribute__((section("RamFunction"))) func
469#else
470#error Toolchain not supported.
471#endif /* defined(__ICCARM__) */
474#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
475 void DefaultISR(void);
476#endif
477
478/*
479 * The fsl_clock.h is included here because it needs MAKE_VERSION/MAKE_STATUS/status_t
480 * defined in previous of this file.
481 */
482#include "fsl_clock.h"
483
484/*
485 * Chip level peripheral reset API, for MCUs that implement peripheral reset control external to a peripheral
486 */
487#if ((defined(FSL_FEATURE_SOC_SYSCON_COUNT) && (FSL_FEATURE_SOC_SYSCON_COUNT > 0)) || \
488 (defined(FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT) && (FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT > 0)))
489#include "fsl_reset.h"
490#endif
491
492/*******************************************************************************
493 * API
494 ******************************************************************************/
495
496#if defined(__cplusplus)
497extern "C" {
498#endif /* __cplusplus*/
499
516static inline status_t EnableIRQ(IRQn_Type interrupt)
517{
518 status_t status = kStatus_Success;
519
520 if (NotAvail_IRQn == interrupt)
521 {
522 status = kStatus_Fail;
523 }
524
525#if defined(FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS) && (FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS > 0)
526 else if ((int32_t)interrupt >= (int32_t)FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS)
527 {
528 status = kStatus_Fail;
529 }
530#endif
531
532 else
533 {
534#if defined(__GIC_PRIO_BITS)
535 GIC_EnableIRQ(interrupt);
536#else
537 NVIC_EnableIRQ(interrupt);
538#endif
539 }
540
541 return status;
542}
543
560static inline status_t DisableIRQ(IRQn_Type interrupt)
561{
562 status_t status = kStatus_Success;
563
564 if (NotAvail_IRQn == interrupt)
565 {
566 status = kStatus_Fail;
567 }
568
569#if defined(FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS) && (FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS > 0)
570 else if ((int32_t)interrupt >= (int32_t)FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS)
571 {
572 status = kStatus_Fail;
573 }
574#endif
575
576 else
577 {
578#if defined(__GIC_PRIO_BITS)
579 GIC_DisableIRQ(interrupt);
580#else
581 NVIC_DisableIRQ(interrupt);
582#endif
583 }
584
585 return status;
586}
587
605static inline status_t EnableIRQWithPriority(IRQn_Type interrupt, uint8_t priNum)
606{
607 status_t status = kStatus_Success;
608
609 if (NotAvail_IRQn == interrupt)
610 {
611 status = kStatus_Fail;
612 }
613
614#if defined(FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS) && (FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS > 0)
615 else if ((int32_t)interrupt >= (int32_t)FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS)
616 {
617 status = kStatus_Fail;
618 }
619#endif
620
621 else
622 {
623#if defined(__GIC_PRIO_BITS)
624 GIC_SetPriority(interrupt, priNum);
625 GIC_EnableIRQ(interrupt);
626#else
627 NVIC_SetPriority(interrupt, priNum);
628 NVIC_EnableIRQ(interrupt);
629#endif
630 }
631
632 return status;
633}
634
653static inline status_t IRQ_SetPriority(IRQn_Type interrupt, uint8_t priNum)
654{
655 status_t status = kStatus_Success;
656
657 if (NotAvail_IRQn == interrupt)
658 {
659 status = kStatus_Fail;
660 }
661
662#if defined(FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS) && (FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS > 0)
663 else if ((int32_t)interrupt >= (int32_t)FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS)
664 {
665 status = kStatus_Fail;
666 }
667#endif
668
669 else
670 {
671#if defined(__GIC_PRIO_BITS)
672 GIC_SetPriority(interrupt, priNum);
673#else
674 NVIC_SetPriority(interrupt, priNum);
675#endif
676 }
677
678 return status;
679}
680
698static inline status_t IRQ_ClearPendingIRQ(IRQn_Type interrupt)
699{
700 status_t status = kStatus_Success;
701
702 if (NotAvail_IRQn == interrupt)
703 {
704 status = kStatus_Fail;
705 }
706
707#if defined(FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS) && (FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS > 0)
708 else if ((int32_t)interrupt >= (int32_t)FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS)
709 {
710 status = kStatus_Fail;
711 }
712#endif
713
714 else
715 {
716#if defined(__GIC_PRIO_BITS)
717 GIC_ClearPendingIRQ(interrupt);
718#else
719 NVIC_ClearPendingIRQ(interrupt);
720#endif
721 }
722
723 return status;
724}
725
734static inline uint32_t DisableGlobalIRQ(void)
735{
736 uint32_t mask;
737
738#if defined(CPSR_I_Msk)
739 mask = __get_CPSR() & CPSR_I_Msk;
740#elif defined(DAIF_I_BIT)
741 mask = __get_DAIF() & DAIF_I_BIT;
742#else
743 mask = __get_PRIMASK();
744#endif
745 __disable_irq();
746
747 return mask;
748}
749
760static inline void EnableGlobalIRQ(uint32_t primask)
761{
762#if defined(CPSR_I_Msk)
763 __set_CPSR((__get_CPSR() & ~CPSR_I_Msk) | primask);
764#elif defined(DAIF_I_BIT)
765 if (0UL == primask)
766 {
767 __enable_irq();
768 }
769#else
770 __set_PRIMASK(primask);
771#endif
772}
773
774#if defined(ENABLE_RAM_VECTOR_TABLE)
782uint32_t InstallIRQHandler(IRQn_Type irq, uint32_t irqHandler);
783#endif /* ENABLE_RAM_VECTOR_TABLE. */
784
785#if (defined(FSL_FEATURE_SOC_SYSCON_COUNT) && (FSL_FEATURE_SOC_SYSCON_COUNT > 0))
786
787/*
788 * When FSL_FEATURE_POWERLIB_EXTEND is defined to non-zero value,
789 * powerlib should be used instead of these functions.
790 */
791#if !(defined(FSL_FEATURE_POWERLIB_EXTEND) && (FSL_FEATURE_POWERLIB_EXTEND != 0))
805void EnableDeepSleepIRQ(IRQn_Type interrupt);
806
820void DisableDeepSleepIRQ(IRQn_Type interrupt);
821#endif /* FSL_FEATURE_POWERLIB_EXTEND */
822#endif /* FSL_FEATURE_SOC_SYSCON_COUNT */
823
824#if defined(DWT)
828void MSDK_EnableCpuCycleCounter(void);
829
835uint32_t MSDK_GetCpuCycleCount(void);
836#endif
837
838#if defined(__cplusplus)
839}
840#endif /* __cplusplus*/
841
842/* @} */
843
844#endif /* _FSL_COMMON_ARM_H_ */