Supported Platforms: MODM7AE70

The Power Management Controller (PMC) optimizes power consumption by controlling all system and user peripheral clocks. The PMC enables/disables the clock inputs to many of the peripherals and the Cortex-M7 processor. The clocking system in the SAME70 processor has a multitude of configuration options. The consequence of that is that it also complex. For detailed information, especially with respect to PCK registers, refer to chapter 31. Power Management Controller (PMC) of the SAME70 data sheet in your "\nburn\docs\Microchip" folder.

The PMC controller handles clocking for the entire processor. This examples if focused on the PCK outputs PCK0 and PCK1 on MODM7AE70:

PCK0 on pin P1.31 and P2.11
PCK1 on pin P2.8, P2.21, P2.24, P2.38, P2.39 and P2.40

For reference, PCK System Assignments:

PCK3: ETM
PCK4: UARTx/USARTx
PCK5: MCANx
PCK6: TCx
PCK7: TC0

PMC_PCKx [x=0..7]: PMC Programmable Clock Register, Read/write Programmable Clock Prescaler and Programmable Clock Source. Bits 11:4 - PRES[7:0] Programmable Clock Prescaler Value Description 0 - 255 Selected clock is divided by PRES+1.

Bits 2:0 - CSS[2:0] Programmable Clock Source Selection Value Name Description 0 SLOW_CLK SLCK is selected 1 MAIN_CLK MAINCK is selected 2 PLLA_CLK PLLACK is selected 3 UPLL_CLK UPLLCKDIV is selected 4 MCK MCK is selected 5 AUDIO_CLK AUDIOPLLCLK is selected

Slow Clock: Slow R/C oscillator input to processor, not used. Main Clock: Oscillator input to processor (MAINCK), 12MHz. PLLA Clock: Generated from MAINCK by the PLLA and a predivider, 300MHz. UTMI PLL Clock: USB transmitter clock (UPLL_CLK). Master Clock: Ouput from Master Clock Controler, 150MHz. Audio Clock: External audio clock input.

Note: Processor electrical specifications limit the clock output frequency based on the pin group. In example testing on P2.11, the maximum output was 150MHz, but other pins may be lower. Refer to the pin group specification for the selected pin in your application.

PMC_SCER: PMC System Clock Enable Register, Enables the corresponding Programmable Clock output. PMC_SCDR: PMC System Clock Disable Register, Disables the corresponding Programmable Clock output. PMC_SCSR: PMC System Clock Status Register, Reads enable/disable state of Programmable Clock output.